Embodiments of the disclosed technology relate to an array substrate, a liquid crystal panel and a liquid crystal display.
At present, liquid crystal displays are the most popular kind of flat panel displays, and thin film transistor liquid crystal display (TFT-LCDs) have been prevailing the market of liquid crystal displays. Among various kinds of TFT-LCDs, fringe field switching (FFS) type TFT-LCD which comprises, for example, a transparent pixel electrode of a plane shape in a lower layer and a common electrode of a grid-like shape in an upper layer is widely used due to the characteristics such as high brightness, high contrast and wide view angle.
Typically, an FFS type TFT-LCD comprises an array substrate, a color filter substrate and a liquid crystal layer sandwiched between the two substrates. FIG. 1A is a top view showing a portion of a conventional array substrate, and FIG. 1B is a sectional view taken along line A-A in FIG. 1. As shown in FIGS. 1A and 1B, the array substrate comprises a base substrate 1. A plurality of data lines 5 and a plurality of gate lines 2 are formed on the base substrate 1 and intersect with each other. A plurality of pixel units are formed in a matrix defined by the intersecting of the data lines 5 and the gate lines 2. Each pixel unit comprises a TFT switch, a pixel electrode 11 and a common electrode 12. The TFT switch comprises a gate electrode 3, a source electrode 7, a drain electrode 8 and an active layer 6. The gate electrode 3 is connected with one gate line 2, the source electrode 7 is connected with one data line 5, the drain electrode 8 is connected with the pixel electrode 11 in the pixel unit, and the active layer 6 is provided between the source/drain electrodes and the gate electrode 3. A gate insulating layer 4 is formed on the gate line 2 and the gate electrode 3 so that the gate line 2 and the gate electrode 3 are insulated from the data line 5. A first passivation layer 9 is formed on the TFT switch and the data line 5 to cover them so that the TFT switch and the data line 5 are insulated from the pixel electrode 11. The pixel electrode 11 is connected with the drain electrode 8 through a passivation layer via hole 10. A second passivation layer 13 is formed on the base substrate 1 to cover the above-mentioned structure, and the common electrode 12 is formed on the second passivation layer 13 so that it is insulated from the data line 5, the gate line 2 and the pixel electrode 11. In addition, the common electrode 12 is provided to be of a grid-like shape and the lower-level pixel electrode 11 is exposed from the common electrode 12, and several forms suitable for the common electrode 12 are shown in FIGS. 1C-1F. FIG. 1C shows that the grid-like common electrode has single-domain strips parallel to the data lines 5, FIG. 1D shows that the grid-like common electrode has dual-domain strips extending along the data lines 5, FIG. 1E shows that the grid-like common electrode has single-domain strips parallel the gate lines 2, and FIG. 1F shows that the grid-like common electrode has dual-domain strips extending along the gate lines 2. In FIG. 1C-1F, the common electrode 12 is the shadow region, and the pixel electrode 11 is exposed from the slit between adjacent strips of the common electrode 12. It should be noted that, the pixel electrode 11 merely is an example of the component exposed by the common electrode 12, and the exposed component is not limited to the pixel electrode 11 depending on the positions of the strips of the common electrode 12.
In the FFS type TFT-LCD, the light transmittance ratio is greatly increased because the electrodes are formed by transparent materials rather than opaque metal materials. In addition, in the FFS type TFT-LCD, both the pixel electrode and the common electrode of each pixel unit are formed on the same array substrate, a fringe electric field is generated between the pixel electrode and the common electrode, and thus the range of the view angle can be widened. However, in the FFS type TFT-LCD, even when the common electrode are of a grid-like shape, a large overlapping region is formed between the common electrode of a pixel unit and the underlying gate lines and/or data lines surrounding the pixel unit, and thus parasitic capacitance is generated, and a resistive-capacitive (RC) delay of the signal transmitted over the gate line and/or data line occurs. In addition, in the trend to liquid crystal panels of a larger size and a higher resolution, gate lines and data lines of increased lengths and amounts are used; and in this case, the overlapping region between the common electrode of a pixel unit and the gate lines and/or data lines surrounding the pixel unit is further increased, and thus parasitic capacitance is increased and the RC delay of signal is aggravated as well. When the signal delay is aggravated to a certain degree, the charging characteristics of a liquid crystal panel would be deteriorated, defects such as bright spots, dark spots and the like are generated on displayed images, and thus display quality is decreased.